Hitachi customers can now use both ModelSim VHDL and Verilog as sign-off simulators. Using ModelSim's mixed-language simulation capability, Hitachi customers now only need a single simulator to ...

By using ModelSim, FPGA designers can simulate Xilinx IP in either Verilog, VHDL or Mixed Language environment. This latest agreement will ensure that future versions of ModelSim are compatible with ...