Abstract: This paper presents a new improved multiplexer based decoder for flash analog-to-digital converters. The proposed decoder is based on 2:1 multiplexers. It calculates the binary code for low ...

Abstract: A decoder for flash analog-to-digital converters with short critical path, regular structure, and small area is presented. The decoder is based on 2:1 multiplexers connected as a tree. Each ...

title: "Demultiplexers" published: true morea_id: r outcome-Design a demultiplexer circuit using both the classical digital design approach and the modern HDL-based approach.

The 74AHC138 and 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138 and ...

Analog multiplexers are a staple for most signal processing applications, especially satellite systems. Microprocessors have a limited number of I/O (input/output) channels and thus use a ...